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PyTorch Code for Simple Neural Networks for MNIST Dataset

Interrupt Servicing (Handling) Mechanism

Sources of Interrupts

  1. Software Error Related Sources:
    1. Overflow
    2. Underflow
    3. Division by zero
    4. Illegal opcode
    5. Programmer defined exceptions
  2. Software code related sources
    1. Breakpoint
    2. Debugging trap
    3. RTC driven software timer
    4. Input driven software timer
    5. Semaphore take and release
    6. Even related
    7. Task blocking overflow
    8. Task finished timeouts
  3. Internal Hardware device sources
    1. Parallel port and UART serial receiver port
    2. UART transmission complete
    3. ADC Start of conversion and End of Conversion
    4. Pulse Accumulator
    5. Real Time Clock
    6. Watch Dog Timer Reset
    7. Timer overflow on timeouts
  4. External Hardware with internal vector address
    1. Maskable pin
    2. Non Maskable pin
  5. External Hardware with external Vector Address
    1. INTR (Interrupt Request pin of 80x86

Context Switching


A context of a program includes program counter and stack pointer. But in some special cases, the context also includes status word register and processor registers.

Context saving and restoring

Pushing all the register at the beginning of an interrupt routine is known as the context saving time and popping them at the end as restoring the context.

Questions: Can a microprocessor be interrupted in the middle of an instruction?

Ans: No, the microprocessor will complete the current instruction in which it is running, then only it will act on the interrupt signal.

Interrupt Latency

The amount of time it takes by a system to respond to an interrupt. There are lot of factors that affects the speediness of the latency. So to increase the latency speed,

1) Make the interrupt routine shorter

2) Disabling interrupts for a shorter duration,

Interrupt latency period (Tlat) is nothing but the sum of the following periods.

Tlat = Time taken for the response and initiating the ISR instructions + time needed to service all the interrupt of higher priorities than that of the present source + maximum period of disabling the interrupt services.

Step 1 – Main Program Running x – ISR1 call

Step 2 – ISR1 Running y - ISR1 Suspended, ISR2 (high Priority) call

Step 3 – ISR2 Running z – ISR2 gets CPU

Step 4 – Context Saving (ISR1) a – ISR2 Completed

Step 5 – Context Saving (ISR2) b – ISR1 running

Step 6 – Context restoring (ISR2) c – ISR1 completed

Step 7 – Context Restoring (ISR1)


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